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71M6541D/F/G Datasheet(PDF) 162 Page - Maxim Integrated Products |
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71M6541D/F/G Datasheet(HTML) 162 Page - Maxim Integrated Products |
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162 / 166 page ![]() 71M6541D/F/G and 71M6542F/G Data Sheet 162 Rev 5 Pin (64-pin) Pin (100-pin) Name Type Circuit Function 39 59 ICE_E I 2 ICE Enable. When zero, E_RST, E_TCLK, and E_RXTX become SEG50, SEG49, and SEG48 respectively. For production units, this pin should be pulled to GND to disable the emulator port. 60 92 TMUXOUT/SEG47 O 4, 5 Multiple-Use Pins. Configurable as either multiplexer/clock output or LCD segment driver using the I/O RAM registers. 61 93 TMUX2OUT/SEG46 59 91 RESET I 2 Chip Reset. This input pin is used to reset the chip into a known state. For normal operation, this pin is pulled low. To reset the chip, this pin should be pulled high. This pin has an internal 30 μA (nominal) current source pulldown. No external reset circuitry is necessary. 35 55 RX I 3 UART0 Input. If this pin is unused it must be terminated to V3P3D or GNDD. 34 54 TX O 4 UART0 Output 51 81 TEST I 7 Enables Production Test. This pin must be grounded in normal operation. 58 90 PB I 3 Pushbutton Input. This pin must be at GNDD when not active or unused. A rising edge sets the WF_PB flag. It also causes the part to wake up if it is in SLP or LCD mode. PB does not have an internal pullup or pulldown resistor. -- 26, 40, 48, 49, 50, 63, 64, 65, 66, 73, 74, 77, 78, 79, 84 NC N/C — No Connection. Do not connect this pin. |
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