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MFS2301BMBACEP Datasheet(PDF) 22 Page - NXP Semiconductors |
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MFS2301BMBACEP Datasheet(HTML) 22 Page - NXP Semiconductors |
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22 / 230 page  NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers Table 10 summarizes the operating modes and available features: Green: Not configurable functions. Orange: Configurable functions Operating mode Function Normal LPON LPOFF Fail-safe Power management HVBUCK ON, PWM mode ON, PFM mode OFF OFF or HVLDO1 ON ON OFF OFF HVLDO2 ON (opt.)[1] OFF (opt.)[2] OFF OFF HVLDO3 ON (opt.)[1] OFF (opt.)[2] OFF OFF System features OFF CAN transceiver Full functionality Wake-up capable Wake-up capable OFF LIN transceiver Full functionality Wake-up capable Wake-up capable OFF WAKEx pins Full functionality Wake-up capable Wake-up capable OFF HVIOx pins Full functionality Wake-up capable Wake-up capable OFF LVIOx pins Full functionality Wake-up capable OFF OFF High-side drivers Full functionality Cyclic-sense capable Cyclic-sense capable OFF SPI/I2C interface Full functionality Wake-up capable OFF OFF Long duration timer (LDT) Full functionality Wake-up capable Wake-up capable OFF AMUX Full functionality OFF OFF OFF Functional safety OFF Voltage monitoring Full functionality V1UVLP only OFF OFF Watchdog monitoring Full functionality Timeout (opt.)[2] OFF OFF FCCU monitoring Full functionality OFF OFF OFF ABIST on demand Full functionality OFF OFF OFF INIT CRC check Full functionality OFF OFF OFF Clock monitoring Full functionality OFF OFF OFF RSTB pin Full functionality Released by default Asserted Asserted FS0B pin Full functionality Asserted Asserted Asserted LIMP0 pin (and LIMP1/2) Full functionality Released by default Released by default Asserted Table 10. Operating modes summary [1] In Normal mode, V2 and V3 regulators can be enabled and disabled by SPI / I2C [2] In LPON mode, V2 and V3 regulators are considered OFF by default but can be kept ON if previously configured by SPI/I2C. The watchdog can also be kept active (timeout) in LPON, if previously configured by SPI / I2C. FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 22 / 230 |
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