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MFS2301BMBACEP Datasheet(PDF) 79 Page - NXP Semiconductors

Part # MFS2301BMBACEP
Description  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2301BMBACEP Datasheet(HTML) 79 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
aaa-051465
CLOSED
OPEN
CLOSED
Window period
OPEN
CLK
CLK
accuracy
accuracy
refresh
slot
refresh
slot
Figure 44. Window watchdog time diagram
Window WD
Timeout WD
SPI/I2C
Closed
Open
(Always open)
BAD key
WD_NOK
WD_NOK
WD_NOK
GOOD key
WD_NOK
WD_OK
WD_OK
None (timeout)
N/A
WD_NOK
WD_NOK
Table 36. Watchdog answer and refresh validation
19.2.2 Watchdog error counter
A watchdog error counter is implemented in the device to filter the incorrect watchdog refresh. Each time a
watchdog failure occurs, the device increments this counter by 2. The watchdog error counter is decremented
by 1 each time the watchdog is properly refreshed. This principle ensures a cyclic ’OK/NOK’ behavior
converges to a failure detection.
To allow flexibility in the application, the maximum value of this counter is configurable with the
WD_ERR_LIMIT[1:0] bits during the INIT phase.
WD_ERR_LIMIT[1:0]
Watchdog error counter value
00
8
01 (default)
6
10
4
11
2
Reset condition
POR
Table 37. Watchdog error counter limit configuration
The watchdog error counter value can be read by the MCU for diagnostic with the WD_ERR_CNT[3:0] bits.
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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