MFS2301BMBACEP datasheet(24/230 Pages) NXP

24 / 230 page

NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

12.4 Detailed functional state diagram

From any

Mx state

VBOS < VBOS_por

Or VDIG < VDIG_por

Or VDIG > VDIG_ov

All regulators OFF

Reset Go2LPON/Go2LPOFF_latch

Power down

VBOS > VBOS_por

And VDIG > VDIG_por

And VDIG < VDIG_ov

1 ms timeout

Start HP

analog

1 MHz oscillator enabled

UVx, OVx, TSDx masked

Start 1 ms timer

Cold start

20 MHz oscillator enabled

HP analog enabled

Start 20 µs timer

20 µs timeout

And VBOS > VBOS_uv

And LOAD_OTP_BYP = 0

Load and

emulate

OTP

OTP_MODE = 0

Or OTP_EXIT = 1

Wait VSUP

Slot 0

V1 power-up

Slot 1, 2

Vx power-up

NORMAL

Slot 2, 1

Vx power-

down

Slot 0 -To

LPOFF

V1 power

down

20 µs timeout

M11

LPOFF

M12

LPON

M10

Slot 0 -To

LPON

V1 ramp-

down to

V1_LP

To M2

FAIL-SAFE

Wake-up

event LPOFF

Wake-up

event LPON

V1UV_LP = 1

-> V1_UVLP_WU =1

(1 ms timeout and Go2LPON_latch = 1)

Or (V1UV_LP = 1 and Go2LPON_latch = 1)

OTP programming and/or OTP

emulation possible in this state

V1UV_LP = 1 and

Go2LPON_latch = 1

20 µs timeout

And VBOS > VBOS_uv

And LOAD_OTP_BYP = 1

Debug mode detection

20 µs timeout

And VSUP > VSUP_uv

And VBOS > VBOS_uv

And OTP_ERROR = 0

FLT_ERR_CNT > = max or

(V1UV_LP = 1 and Go2LPON_latch = 1)

V1_OV_2us

Or VBOS < VBOS_uv

Or (VxTSD_l = 1 and CONF_TSD_Vx_OTP = 1)

Or (VxOV_l = 1 and CONF_OV_Vx_OTP = 1)

Or 100 ms timeout

OTP_ERROR = 1 or

(V1UV_LP = 1 and Go2LPON_latch = 1)

V1 FPWM or PNP enabled

OVx, TSDx unmasked

Start 20 µs timer

V1 ON (soft start)

Vx ON if configured (soft start)

HVIOx/LVIOx ON if configured

FLT_ERR_CNT enabled

Start 100 ms timer

V1 > V1UV_LP and

TSOFT_START_V1 completed

FLT_ERR_CNT > = max

Or V1UV_LP = 1

Or V1_OV_2us = 1

Or VBOS < VBOS_uv

Or (VxTSD_I = 1 and CONF_TSD_Vx_OTP = 1)

Or (VxOV_I = 1 and CONF_OV_Vx_OTP = 1)

SLOT_BYP = 1 and

Go2LPON_latch = 1

Vx ON if configured (soft start)

HVIOx/LVIOx ON if configured

TSLOTxcompleted

FLT_ERR_CNT > = max

Or VBOS < VBOS_uv

Or (VxTSD_I = 1 and CONF_TSD_Vx_OTP = 1)

Or (VxOV_I = 1 and CONF_OV_Vx_OTP = 1)

Or (V1_OCLS_I and V1_OCLS_EN_OTP = 1)

Or (V1OC_I and TLDO1_ILIM_TO and V1_PNP_EN_OTP)

UVx unmasked

Reset Go2LPON/Go2LPOFF_latch

(V1UV_LP = 1 and Go2LPON_latch = 1)

Or (VBOS < VBOS_uv and Go2LPOFF_latch)

Or (VxTSD_I = 1 and CONF_TSD_Vx_OTP = 1)

Or (VxOV_I = 1 and CONF_OV_Vx_OTP = 1)

Go2LPON_latch = 1 <- Go2LPON = 1 or

Go2LPOFF_latch = 1 <- Go2LPOFF = 1

Vx OFF if configured and Vx_LPON = 0

Start TSLOT_DOWN_Vx timer(s)

HVIOx/LVIOx to default if configured

FLT_ERR_CNT disabled

UVx masked

TSLOT_DOWN_Vx completed

And Go2LPON_latch = 1

V1 ramp to V1_LP

Vx OFF if Vx_LPON = 0

HVIOx/LVIOx to default

if configured

TSLOT_DOWN_Vx completed

And Go2LPOFF_latch = 1

All regulators OFF

All IOs OFF

OVx, TSDx masked

Start 20 µs timer

V1UV_LP = 1

Or (VxTSD_I = 1 and

CONF_TSD_Vx_OTP = 1)

Or (VxOV_I = 1 and

CONF_OV_Vx_OTP = 1)

TRAMP_DOWN_V1 completed

20 MHz oscillator disabled

HP analog disabled

V1 FPWM or PNP disabled

OVx, TSDx masked

20 MHz oscillator disabled

HP analog disabled

V1 FPWM or PNP disabled

TFS_DUR timeout

And FS_LPOFF_OTP = 1

And V1UV_LP_WU = 0

And KEY_OFFON_EN_OTP = 0)

(KEY_OFFON_EN_OTP = 1

And WAKE1 = 0)

TFS_DUR timeout

And (FS_LPOFF_OTP = 0

Or V1UV_LP_WU = 1)

And KEY_OFFON_EN_OTP = 0

All regulators OFF

HP analog enabled

20 MHz oscillator enabled

V1 FPWM or PNP enabled

Reset Go2LPON/Go2LPOFF_latch

UVx, OVx, TSDx masked

FLT_ERR_CNT disabled

Start TFS_DUR timer

-> FS_EVT = 1

Legend: Blue: Device action, GREEN: Safety related device action, BLACK: Device state

aaa-051437

Figure 11. Detailed functional state diagram

FS23

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.0 — 16 October 2024

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