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MFS2301BMBACEP Datasheet(PDF) 52 Page - NXP Semiconductors

Part # MFS2301BMBACEP
Description  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2301BMBACEP Datasheet(HTML) 52 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
configured slot starts. See Figure 29 as an example of HVIO pins configuration, with HVIO1 default state low
and assigned to power sequence slot 1, and HVIO2 default state high assigned to power sequence slot 2.
aaa-051451
VBAT
HVIO1
(default 0)
HVIO2
(default 1)
OTP
Loaded
Slot 0
Tslot
Tslot
Tslot
Slot 1
Slot 2
Vsup > Vsup_UV
Figure 29. Example of HVIO pins configuration in the slots, at power up
HVIO1 and HVIO2 pins can also be configured respectively as LIMP1 and LIMP2 pseudo-safety outputs. These
functions come in addition to LIMP0 safety output pin, and are described in detail in Section 19.6.6.
15.2.3 Electrical characteristics
TA = −40 °C to 125 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All voltages referenced to ground.
Symbol
Parameter
Min
Typ
Max
Unit
HVIO1, HVIO2
HVIO12VIL
Digital low-input voltage threshold (falling)
-
-
2.0
V
HVIO12VIH
Digital high-input voltage threshold (rising)
2.97
-
-
V
HVIO12HYST
Hysteresis
50
100
400
mV
HVIO12VOL
Low-output level (IOUT = 2 mA)
-
-
0.4
V
HVIO12ILIM
Current limitation
4
-
22
mA
RPD_HVIO12
Pulldown resistance
100
200
400
kΩ
RPU_HVIO12
Pullup resistance
100
200
400
kΩ
THVIO12_FLT[1]
Wake-up filtering time
HVIOx_DGLT = 0
HVIOx_DGLT = 1
12
50
15
65
25
80
μs
THVIO12_FALL
Fall time (external pull up at VUP = 14 V, COUT_
HVIO12 = 10 nF)
-
-
35
μs
THVIO12_FALL_nocap
Fall time (external pull up at VUP = 14 V, no
capacitor)
-
-
10
μs
Table 23. HVIO12 electrical characteristics
[1]
There is no digital filtering when HVIOx input pin is used as a source to control an high-side driver.
15.3 LVIO3, LVIO4, LVI5, LVO6
The LVIO3 and LVIO4 pins are low-voltage digital input/output. They can be used as digital input as wake-up
sources for the device, or as digital outputs.
The MOSI/LVI5 pin can only be used as digital input, and MISO/LVO6 can only be used as digital output.
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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