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MFS2301BMBACEP Datasheet(PDF) 44 Page - NXP Semiconductors

Part # MFS2301BMBACEP
Description  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2301BMBACEP Datasheet(HTML) 44 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
13.3 HVLDO2: High-voltage linear regulator 2
13.3.1 Functional description
General operation
The HVLDO2 is a high-voltage linear-voltage regulator. The HVLDO2 is commonly supplied from the battery.
The output voltage is configurable by OTP at 3.3 V or 5.0 V.
The HVLDO2 is low-power capable and can stay enabled in LPON mode. However, if disabled in LPON mode,
it cannot be enabled again by SPI/I2C in this mode.
This regulator is meant to supply load on the ECU or outside of the module: a dedicated feedback pin is
implemented so a diode can be added between V2_FB pin and V2 pin in order to protect the regulator against
short to the battery. If V2 is used as a local supply, V2_FB is shorted to V2 pin.
Open-feedback detection
A comparator is implemented to detect an open between V2_FB and V2 pins. When the difference between the
two voltages is higher than VDELTA_V2_to_V2_FB threshold, the regulator is turned OFF. It can be enabled again by
SPI/I2C command.
Current limitation and thermal shutdown
An overcurrent detection and a thermal shutdown are implemented on HVLDO2 to protect the internal pass
device. The overcurrent threshold is configurable by OTP (CONF_OC_V2_OTP). When an overcurrent is
detected, V2OC_I flag is generated and the regulator remains enabled. It is the MCU's responsibility to disable
the regulator by SPI/I2C using the V2DIS bit, and to decide when to enable the regulator using the V2EN bit.
When a thermal shutdown is detected, the regulator is disabled and V2TSD_I flag is generated.
13.3.2 Application schematic
aaa-051447
CIN_LDO2
COUT_LDO2
Optional
VLDO2
V2_IN
HVLDO2
Figure 25. HVLDO2 application schematic
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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