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MFS2301BMBACEP Datasheet(PDF) 89 Page - NXP Semiconductors

Part # MFS2301BMBACEP
Description  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2301BMBACEP Datasheet(HTML) 89 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
The fault error counter has two output values: intermediate and final. The intermediate value can be used
to force the FS0B or LIMP0 activation or generate a RSTB pulse according to the FLT_MID_RSTB/FS0B/
LIMP0_IMPACT bits configuration (INIT phase).
FLT_MID_RSTB/FS0B/LIMP0_IMPACT
Intermediate value impact on RSTB/FS0B/LIMP0
0
No effect on the pin
1 (default)
The pin RSTB/FS0B/LIMP0 is asserted
Reset condition
POR
Table 52. Fault error counter fail-safe impact
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
INCR
INCR
INCR
INCR
INCR
INCR
FAULT_ERR_CNT_LIMIT = 01
FLT_ERR_CNT_ INIT
0
1
2
3
4
5
6
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
WD_RFR_CNT = WD_RFR_
CNT_LIMIT + WD Refresh OK
INCR
INCR
FAULT_ERR_CNT_LIMIT = 00
FLT_ERR_CNT_ INIT
0
1
2
aaa-051470
Figure 49. Fault Error Counter diagram with maximum value = 2 or 6
 
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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