MFS2301BMBACEP datasheet(75/230 Pages) NXP

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NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

TA = −40 °C to 125 °C, unless otherwise specified. VSHS = VSHS_UV to 28V, unless otherwise specified. VDDIO = 3V to

5.5V, unless otherwise specified. All voltages referenced to ground.

Symbol

Description

Min

Typ

Max

Unit

LIN Bus

VLIN_REC

LIN receiver Recessive state, Active mode

0.6 x

VSHS

VLIN_IN_DOM

LIN receiver Dominant state, Active mode

0.4 x

VSHS

VLIN_ CENTER

LIN receiver center voltage (VLIN_REC + VLIN_IN_DOM)/2,

Active mode

0.475

x VSHS

0.5 x

VSHS

5.25 x

VSHS

VLIN_ HYST

LIN receiver hysteresis voltage (VLIN_REC - VLIN_IN_DOM),

Active mode

0.175

x VSHS

VLIN_ DIODE

LIN voltage drop at serial diode in pullup path, with RLIN_SLAVE

and IDIODE = 0.9 mA

0.4

0.7

1.0

RLIN_SLAVE

LIN responder resistance

kΩ

ILIM_LIN_ACT_DOM

LIN current limitation Dominant state, Active mode

200

IQLIN_IN_REC

LIN receiver recessive input leakage current

IQLIN_IN_DOM

LIN receiver dominant input leakage current including pullup

resistor

-1

ILIN_ACT_DOM

LIN current consumption, LIN Active mode, Dominant state,

Tj = 150 °C. Measured via VSHS pin

2.70

ILIN_ACT_REC

LIN current consumption, LIN Active mode, Recessive state,

Tj = 150 °C. Measured via VSHS pin

1.35

ILIN_NO_GND

LIN current consumption, control unit disconnected from

ground (GNDDevice = VSHS), VBAT = 12 V, VLIN = 0 V to 18 V

-1

ILIN_NO_BAT

LIN current consumption, VBAT disconnected (VSHS = GND),

VLIN = 0 V to 18 V

ILIN_WU

LIN current consumption, wake capability, Tj = 85 °C,

VBOS = 5 V. Measured via VSHS pin

CLIN

LIN pin capacitance

Dynamic characteristics

TLIN_EN

Setup time needed when going to Active mode of the

transceiver before sending data.

µs

DLIN1

Duty cycle 1,

THRec(max) = 0.744 x VSHS, THDom(max) = 0.581 x VSHS,

VSHS = 7.0 V to 18 V, TLIN_BIT = 50 µs, D1 = TBus_rec(min)/(2 x

TLIN_BIT)

39.6

DLIN2

Duty cycle 2,

THRec(min) = 0.422 x VSHS, THDom(min) = 0.284 x VSHS, VSHS =

7.6 V to 18 V, TLIN_BIT = 50 µs, D2 = TBus_rec(max)/(2 x TLIN_BIT)

58.1

DLIN3

Duty cycle 3,

THRec(max) = 0.778 x VSHS, THDom(max) = 0.616 x VSHS,

VSHS = 7.0 V to 18 V, TLIN_BIT = 96 µs, D3 = TBus_rec(min)/(2 x

TLIN_BIT)

41.7

Table 33. LIN transceiver characteristics...continued

FS23

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.0 — 16 October 2024

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