MFS2301BMBACEP datasheet(97/230 Pages) NXP

97 / 230 page

NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

When configured as PWM, LIMP1 is static when no fault is reported and toggles at 1.25 Hz with a 50 % duty

cycle when asserted.

When configured as PWM, LIMP2 is static when no fault is reported and toggles at 100 Hz when asserted. Its

duty cycle is configurable between 2.5 %/5 %/10 %/20 % using LIMP2_DC_CFG[1:0] bit.

TA = −40 °C to 125 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All voltages

referenced to ground.

Symbol

Parameter

Min

Typ

Max

Unit

Dynamic electrical characteristics

LIMP1PWM_FREQ

LIMP1 PWM frequency

1.13

1.25

1.38

LIMP1PWM_DLY

LIMP1 PWM assertion delay

500

µs

LIMP2PWM_FREQ

LIMP2 PWM frequency

100

120

LIMP2PWM_DLY

LIMP2 PWM assertion delay

500

µs

Table 59. LIMP1, LIMP2 electrical characteristics

19.7 Analog built-in self-test (ABIST)

The FS23 provides an analog built-in self-test (ABIST) to verify the correct functionality of the voltage monitoring

functions. The ABIST is executed on demand, after a SPI/I2C request from the MCU. ABIST can only be

launched from Normal mode. A status bit ABIST_READY is provided to notify that ABIST is available and ready

to be launched.

ABIST can be launched for all the voltage-monitoring channels at the same time (via LAUNCH_ABIST bit), or

individually (via ABIST_VxMON or ABIST_V1UVLP individual bits). An individual diagnostic bit is available for

each channel once the ABIST is done (ABIST_DONE = 1). The diagnostics flags have no impact on the safety

pins.

The diagnostic flags must be cleared before launching the next ABIST, using the CLEAR_ABIST bit.

If one of the concerned monitored voltages is out of range (OV or UV), the ABIST on-demand command is

ignored. While the ABIST is running, the other monitoring functions are kept available.

TA = −40 °C to 125 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All voltages

referenced to ground.

Symbol

Parameter

Min

Typ

Max

Unit

ABIST

TABIST

ABIST duration for one monitoring channel

Table 60. ABIST electrical characteristics

19.8 Periodic CRC check

The FS23 provides an 8-bit periodic CRC check to verify the integrity of the INIT registers (FS_I_xxxx)

containing the safety configuration information (configurable in INIT mode only). This mechanism allows the

detection of a misconfiguration from the MCU or a bit flip in the INIT registers.

The 8-bit CRC is computed on the result of the concatenation of the following 58 register bits:

• FS_I_OVUV_CFG1[12:7], FS_I_OVUV_CFG1[5:0]

• FS_I_OVUV_CFG2[12:7], FS_I_OVUV_CFG2[5:0]

• FS_I_FCCU_CFG[14:0]

• FS_I_FSSM_CFG[14:4]

FS23

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.0 — 16 October 2024

Document feedback

97 / 230

MFS2301BMBACEP Datasheet(PDF) 97 Page - NXP Semiconductors

MFS2301BMBACEP Datasheet(HTML) 97 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL