MFS2301BMBACEP datasheet(92/230 Pages) NXP

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NXP Semiconductors

FS23

Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers

19.5.3 Fail-Safe mode

FS23 enters in Fail-Safe (FS) mode when:

• The fault error counter reaches its maximum value (not configurable)

• VBOS UV is detected

• RSTB is asserted low for 8 s (if enabled by OTP)

• VxOV is detected (if configured by OTP)

• VxTSD is detected (if configured by OTP)

• Negative overcurrent (V1_OC_LS) is detected in HVBUCK version (if enabled by OTP)

• OC timeout is detected in HVLDO1 version used with external PNP

• V1UVLP is detected in LPON mode or during transition from LPON mode to Normal mode

• When the first fault is detected (if configured by OTP)

In Fail-Safe mode, all the regulators are turned off, the high-power analog circuitry in enabled, the 20 MHz

oscillator is enabled, the OV/UV monitoring is turned on, and the FS_EVT bit is set to 1.

The fault error counter is reset to 1.

The device exits the Fail-Safe state after TFS_DUR time. If FS_LPOFF_OTP bit is set to 1 or if

KEY_OFFON_EN_OTP bit is set to 1, the device exits FS state and goes to LPOFF. Otherwise, the device goes

back automatically to the power-up sequence.

TA = −40 °C to 125 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All voltages

referenced to ground.

Symbol

Parameter

Min

Typ

Max

Unit

Fail-Safe

TFS_DUR

Fail-Safe state duration

• FS_DUR_CFG_OTP = 0

• FS_DUR_CFG_OTP = 1

3.6

100

4.0

110

4.4

Table 54. Fail-Safe state electrical characteristics

19.6 RSTB, FS0B, LIMP0/1/2

Three safety output pins, RSTB, FS0B, and LIMP0, are implemented in order to guarantee the safe state of the

system. All those safety outputs are active low.

RSTB and FS0B are activated during power up and can only be released when the device is in Normal mode.

LIMP0, on the contrary, will be released at startup and will only be asserted when a fault occurs.

The three pins are managed independently in parallel of the main state machine.

19.6.1 RSTB

RSTB is an open-drain output that can be connected in the application to the reset of the MCU. RSTB requires

an external pullup resistor to VDDIO and a filtering capacitor to GND for immunity. An internal pulldown

RSTBRPD ensures RSTB low level in LPOFF mode and in Power-Up/Down mode. Redundant supplies of the

RSTB driver ensures the pin will be driven low when VSUP is lost. When RSTB is stuck low for more than

RSTBT8S, the device transitions in Fail-Safe mode. RSTB assertion depends on the device configuration during

INIT phase. The configurations can be pre-selected by OTP. RSTB can also be asserted at MCU request by

SPI/I2C, to check the correct hardware connection.

FS23

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 7.0 — 16 October 2024

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