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MFS2301BMBACEP Datasheet(PDF) 86 Page - NXP Semiconductors |
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MFS2301BMBACEP Datasheet(HTML) 86 Page - NXP Semiconductors |
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86 / 230 page ![]() NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers 19.4.2 VxMON monitoring (x from 1 to 3) V1 and V3 regulators are monitored via the corresponding V1 and V3 pins, which also serve as feedback pins. V2 is monitored via its dedicated V2_FB feedback pin. The expected voltage for each regulators, 3.3 V or 5 V, is configured by OTP (VxMON_OTP), separately from the output voltage and must be configured the same. Each voltage monitoring channel is connected to a pulldown resistor to detect an undervoltage in case of disconnection. The VxMON threshold have ±1.5 % UV/OV accuracy (trimmed at 5 V setting, 5.0 % VxMON threshold). 19.4.3 VxMON UV/OV threshold The OV and UV thresholds are configured independently for each VxMON (x from 0 to 3) by OTP at VxMON_UVTH_OTP[3:0] and VxMON_OVTH_OTP[3:0]. UV thresholds are configurable from 96.5 % to 91.5 % and OV thresholds are configurable from 102.5 % to 110 %. When a regulator is configured at 5 V, five additional UV thresholds are available at 61 %, 62 %, 62.5 %, 63 %, and 64 %. VxMON_UVTH_OTP[3:0] VxMON_OVTH_OTP[3:0] VxMON undervoltage threshold configuration VxMON overvoltage threshold configuration 0000 64 % (for 5 V only) 102.5 % 0001 63 % (for 5 V only) 103.0 % 0010 96.5 % 103.5 % 0011 96.0 % 104.0 % 0100 95.5 % 104.5 % 0101 95.0 % 105.0 % 0110 94.5 % 105.5 % 0111 94.0 % 106.0 % 1000 93.5 % 106.5 % 1001 93.0 % 107.0 % 1010 92.5 % 107.5 % 1011 92.0 % 108.0 % 1100 91.5 % 108.5 % 1101 62.5 % (for 5 V only) 109.0 % 1110 62 % (for 5 V only) 109.5 % 1111 61 % (for 5 V only) 110.0 % Table 48. VxMON UV/OV threshold configuration FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 86 / 230 |
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