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MFS2301BMBACEP Datasheet(PDF) 12 Page - NXP Semiconductors |
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MFS2301BMBACEP Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 230 page  NXP Semiconductors FS23 Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers 7.2 Pin description Pin Pin name Type Description 1 HVIO1 Digital input/output High-voltage I/O 1, with wake-up capability 2 HS2 Analog output High-side driver 2 3 HS1 Analog output High-side driver 1 4 V3_IN Analog input V3 regulator input voltage 5 FS0B Digital output Fail-safe output 0 - Active low (low by default) 6 V3 Analog output V3 regulator output voltage 7 CANH Analog input/output CAN bus - CAN high 8 CANL Analog input/output CAN bus - CAN low 9 GNDCAN Ground CAN bus - ground 10 LIN Analog input/output LIN single-wire bus transmitter and receiver 11 GNDLIN Ground LIN bus - ground 12 LIMP0 Digital output LIMP Home mode output 0 - Active low (high by default) 13 FCCU1 Digital Input MCU error monitoring input 1 14 AMUX Analog output Multiplexed output to be connected to an MCU ADC with selection of the analog parameter through I2C/SPI. 15 DEBUG Analog input Debug mode entry and OTP input supply (development only) 16 VDIG Analog output Internal supply decoupling capacitor 17 GND_IO Ground I/Os ground connection 18 LVIO4 Digital input/output Low-voltage IO 4, with wake-up capability 19 LVIO3 Digital input/output Low-voltage IO 3, with wake-up capability 20 LINTXD Digital input Transmitter input from the MCU, which controls the state of the LIN bus 21 LINRXD Digital output Receiver output, which reports the state of the LIN bus to the MCU 22 VDDIO Analog input Input voltage for SPI, I2C, LVIOs and AMUX 23 CANRXD Digital output Receiver output, which reports the state of the CAN bus to the MCU 24 CANTXD Digital input Transmitter input from the MCU, which controls the state of the CAN bus 25 MISO/LVO6 Digital output SPI bus - Master input slave output(MISO)/Low-voltage output 6 26 MOSI/LVI5 Digital input SPI bus - Master output slave input(MOSI)/Low-voltage input 5 27 SCK/SCL Digital input/output SPI bus - Clock input / I2C bus - clock input 28 CSB/SDA Digital input/output SPI bus - Chip select (active low) / I2C bus - bidirectional data line 29 RSTB Digital input/output Reset input/output. Active low. The main function is to reset the MCU. Reset input voltage is monitored in order to detect external reset and fault condition. 30 INTB Digital output Interrupt output PGND Ground (FS2320) Power ground connection 31 NC NC (FS2300) Not connected. This pin must be left open. V1_SW Analog input/output (FS2320) Switching node 32 V1_B Analog output (FS2300) V1 external PNP base signal. This pin must be left open if no PNP. 33 V1_IN Analog input V1 regulator input voltage BOOT Analog input/output (FS2320) V1 bootstrap capacitor 34 V1_E Analog output (FS2300) V1 external PNP emitter signal. This pin must be left open if no PNP. Table 3. Pin description FS23 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 7.0 — 16 October 2024 Document feedback 12 / 230 |
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