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MFS2301BMBACEP Datasheet(PDF) 61 Page - NXP Semiconductors

Part # MFS2301BMBACEP
Description  Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
PDF  230 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2301BMBACEP Datasheet(HTML) 61 Page - NXP Semiconductors

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NXP Semiconductors
FS23
Safety system basis chip (SBC) with power management, CAN FD and LIN transceivers
17 Long duration timer
The FS23 features a long duration timer (LDT). The timer is configurable by SPI/I2C and can operate in Normal
and in Low-Power modes.
The FS23 provides several functions and offers a wide range of configurable counting periods, as well as a
calibration mechanism for oscillator compensation.
The timer can be activated in Normal mode and all prescaler options can be selected to allow timer circuitry
verification.
The timer is based on a 24-bit counter, with a 1 MHz/64-input clock, allowing a 1.0 second time base.
aaa-052150
CONTROL REGISTER
To EXTERNAL
To internal:
mode change
(LPON, LPOFF, WU)
INTB
READ REGISTER(S)
24-bit COUNTER
COMP.
24 bits: WAKE UP REGISTER
16 bits: AFTER RUN
REGISTER
PRESCALER 2
(/15625)
PRESCALER 1
(/64)
PRESCALER 3
(/2)
SPI/I2C
interface
1 MHz
OSC
1 µs
64 µs
128 µs
1.0 s
1.0 s (cal:128 µs)
(calibration)
Figure 33. Long duration timer block diagram
In Normal mode operation, the timer can count up to 194 days, with 1 second resolution. In Calibration mode,
the prescaler 2 is bypassed and the timer can count up to 36 minutes, with 128 µs resolution.
Mode
Input clock
frequency
Input clock
period
Prescaler
Counter resolution
Max count
Operation
1 MHz
1 µs
64 x 15625
1.0 s
4660 Hrs
194 days
Calibration
1 MHz
1 µs
64 x 2
128 µs
2160 s
36 min
Table 29. Long duration timer characteristics
The LDT has two modes of operation based on the prescaler used during the count.
• When LDT_MODE = 0, the LDT is set in long count mode.
• When LDT_MODE = 1, the LDT is set in short count mode.
The LDT_AFTER_RUN[15:0] bits are used to set or to read the after-run target value in Normal mode.
The LDT_WUP_H[7:0] and the LDT_WUP_L[15:0] bits is used to set or to read the wakeup target value, in
combination with the LDT_SEL bit:
• LDT_WUP_H[7:0] contains the eight most significant bits of the wake-up target value.
• LDT_WUP_L[15:0] contains the 16 least significant bits of the wake-up target value.
FS23
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 7.0 — 16 October 2024
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