SN8F5708 datasheet(112/204 Pages) SONIX

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SN8F5708 Series

Comparator

Datasheet Rev. 2.4

112

17.2

Comparator Output Function

The comparator output signal is the source of comparator output function. The comparator output

function includes:

CMnOUT output flag: The comparator output signal is connected to CMnOUT flag directly.

CMnOUT bit responses comparator status immediately. Program reads comparator status from

CMnOUT bit.

Comparator extern pin output function: The comparator output status can output to CMnO pin

controlled by CMnOEN bit. When CMnOEN=0, the comparator output pin is GPIO mode. If

CMnOEN=1, CMnO pin outputs comparator output status and isolates GPIO mode.

Comparator edge trigger and interrupt function: The comparator builds in interrupt function, and

the trigger edge is programmable. CMnG[1:0] bit controls comparator trigger edge. When the edge

trigger condition occurs, CMPnF will be set automatically. To clear CMPnF bit must be through

program. If CMnEN=1, program counter will be pointed to interrupt vector to execute interrupt

service routine as CMPnF is setting. When the trigger edge direction is equal to interrupt trigger

condition, the system will execute interrupt operation immediately.

Comparator IDLE Mode Wake-up function: The comparator’s wake-up function only support IDLE

Mode (interrupt needs enable), not STOP Mode. If the trigger edge condition (comparator output

status exchanging) is found, the system will be wake-up from IDLE Mode. Because in interrupt

trigger condition, the CMPnF is set as “1”. Of course the interrupt routine is executed if the

interrupt function enabled.

17.3

PWM Output Control

The results of comparator can be used to control PWM outputs. User can select the appropriate

control mode through CMPT register. The following table lists these types of control methods.

CMnT[1:0]

PWM Synchronous Trigger Operation

CMPn with PWM output is not related.

CMPnF = 1  PWM stop

CMnP > CMnN (Rising edge trigger)  PWM output

CMnP < CMnN (Falling edge trigger)  PWM stop

CMnP < CMnN (Falling edge trigger)  PWM output

CMnP > CMnN (rising edge trigger)  PWM stop

The comparator can control those PWM outputs, depending PWnCM* bits set. See detailed

description of PWM section. OPM register bit 7 – 2: PW3CM1, PW3CM0, PW2CM0, PW2CM1,

PW1CM1, PW1CM0.

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