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SN8F5708 Datasheet(PDF) 114 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 114 Page - SONiX Technology Company |
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114 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. Comparator Datasheet Rev. 2.4 114 CMP1M Register (0x9D) Bit Field Type Initial Description 7 CM1EN R/W 0 Comparator 1 control bit. 0: Disable. CM1P/CM1N pins are GPIO mode. 1: Enable. CM1P/CM1N pins are CMP input pins. 5..4 CM1S[1:0] R/W 00 CMP1 positive input voltage control bit. 00: 2.0V 01: 3.0V 10: 4.0V 11: CM1P 3 CM1OEN R/W 0 Comparator 1 output pin control bit. 0: Disable. CM1O is GPIO mode. 1: Enable. CM1O is comparator output pin and isolate GPIO function. 2 CM1OUT R 0 Comparator 1 output flag bit. 0: CM1P voltage is less than CM1N voltage. 1: CM1P voltage is larger than CM1N voltage. 1..0 CM1G[1:0] R/W 00 Comparator interrupt trigger direction control bit. 00: Reserved. 01: Rising edge trigger. CM1P > CM1N. 10: Falling edge trigger. CM1P < CM1N. 11: Both rising and falling edge trigger (Level change trigger). |
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