SN8F5708 datasheet(115/204 Pages) SONIX

115 / 204 page

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SN8F5708 Series

Comparator

Datasheet Rev. 2.4

115

CMPT Register (0xCE)

Bit

Field

Type

Initial

Description

3..2

CM1T[1:0]

R/W

CMP1 with PWM trigger select bits.

00: CMP1 with PWM output is not related.

01: CMP1F = 1  PWM stop

10: CM1P > CM1N  PWM output; CM1P < CM1N 

PWM stop

11: CM1P < CM1N  PWM output; CM1P > CM1N 

PWM stop

1..0

CM0T[1:0]

R/W

CMP0 with PWM trigger select bits.

00: CMP0 with PWM output is not related.

01: CMP0F = 1  PWM stop

10: CM0P > CM0N  PWM output; CM0P < CM0N 

PWM stop

11: CM0P < CM0N  PWM output; CM0P > CM0N 

PWM stop

P3CON Register (0x9F)

Bit

Field

Type

Initial

Description

7..6

P3CON[7:6]

R/W

0x00

P3 configuration control bit*.

0: P3 can be analog input pin (CMP input pin) or digital

GPIO pin.

1: P3 is pure analog input pin and can’t be a digital GPIO

pin.

5..0

Refer to other chapter(s)

* P3CON [7:6] will configure related Port3 pin as pure analog input pin to avoid current leakage.

P2CON Register (0x9E)

Bit

Field

Type

Initial

Description

6..5

P2CON[6:5]

R/W

0x0

P2 configuration control bit

0: P2 can be analog input pin (CMP input pin) or digital

GPIO pin.

1: P2 is pure analog input pin and can’t be a digital GPIO

pin.

Else

Refer to other chapter(s)

* P2CON [6:5] will configure related Port2 pin as pure analog input pin to avoid current leakage.

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