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SN8F5708 Datasheet(PDF) 118 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 118 Page - SONiX Technology Company |
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118 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. OPA Datasheet Rev. 2.4 118 18 OPA The microcontroller builds in two operational amplifiers (OP0 and OP1). The OP-Amp power range is VSS – VDD. OP-Amp input signal and output voltage are within the voltage range. The OP-Amp output pin is programmable to connect with ADC input channel for voltage measurement. + - Vdd Vss Vout V+ V- OPnN Pin OPnEN OPnP Pin OPnO Pin OPnEN OPnEN To ADC channel OP0=>(CHS[4:0]= 11000b) OP1=>(CHS[4:0]= 11001b) M U X GPIO M U X GPIO OPnEN M U X GPIO 18.1 Configurations of Operation The OP-AMP pins are shared with GPIO controlled by OP0EN/OP1EN bit. When OPEN=0, OP AMP pins are GPIO mode. When OPEN=1, GPIO pins switch to OP-AMP and isolate GPIO path. OP-AMP pins selection table is as following. OP-AMP N0. OPnEN OP Positive Pin OP Negative Pin OP Output Pin OP0 OP0EN = 0 All pins are GPIO mode. OP0EN = 1 OP0P (Vin+) OP0N (Vin-) OP0O (Vout) OP1 OP1EN = 0 All pins are GPIO mode. OP1EN = 1 OP0P (Vin+) OP0N (Vin-) OP0O (Vout) OP0/OP1 output pins are also connected to ADC internal AIN12 and AIN13 channel => CHS[4:0]. See detailed description of ADC section. |
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