SN8F5708 datasheet(122/204 Pages) SONIX

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SN8F5708 Series

ADC

Datasheet Rev. 2.4

122

19.1

Configurations of Operation

These configurations must be setup completely before starting ADC converting. ADC is configured

using the following steps:

Choose and enable the start of conversion ADC input channel. (By CHS[4:0] bits and GCHS bit)

The GPIO mode of ADC input channel must be set as input mode. (By PnM register)

The internal pull-up resistor of ADC input channel must be disabled. (By PnUR register)

The configuration control bit of ADC input channel must be set. (By PnCON register)

Choose ADC high reference voltage and low reference Voltage. (By VREFH register)

Choose ADC Clock Rate. (By ADCKS[1:0] bits)

After setup ADENB bits, the ADC ready to convert analog signal to digital data.

When ADC IP is enabled by ADENB bit, it is necessary to make an ADC start-up by program. Writing

a 1 to the ADS bit of register ADM. After setup ADENB and ADS bits, the ADC starts to convert

analog signal to digital data. The ADS bit is reset to logic 0 when the conversion is complete. When

the conversion is complete, the ADC circuit will set EOC and ADCF bits to “1” and the digital data

outputs in ADB and ADR registers. If ADC interrupt function is enabled (EADC = 1), the ADC

interrupt request occurs and executes interrupt service routine when ADCF is “1” after ADC

converting. Clear ADCF by hardware automatically in interrupt procedure. Note that when ADPWS

bit is “1”, if PWM enable trigger be used as the conversion source, the ADC will continuous

conversions until PWM is disabled.

19.2

ADC input channel

The ADC builds in 12-channel input source (AIN0 – AIN11) to measure 12 different analog signal

sources controlled by CHS[4:0] and GCHS bits. AIN12, AIN13 channels are OP0 and OP1-Amp

output terminal. The AIN14 is internal 2V or 3V or 4V input channel. There is no any input pin from

outside. In this time ADC reference voltage must be internal VDD and External voltage, not internal

2V or 3V or 4V. AIN14 can be a good battery detector for battery system. To select appropriate

internal AVREFH level and compare value, a high performance and cheaper low battery detector is

built in the system.

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