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SN8F5708 Datasheet(PDF) 124 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 124 Page - SONiX Technology Company |
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124 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. ADC Datasheet Rev. 2.4 124 19.3 Reference Voltage The ADC builds in five high reference voltage source controlled through VREFH register. There are one external voltage source and four internal voltage source (VDD, 4V, 3V, 2V). When EVHENB bit is “1”, ADC reference voltage is external voltage source from AVREFH/P5.4. In the condition, P5.4 GPIO mode must be set as input mode and disable internal pull-up resistor. The ADC reference low voltage includes two sources controlled by EVLENB bit. One is internal VSS (EVLENB =0), and the other one is external reference voltage input pin from AVREFL/P5.5 (EVLENB=1). When the P5.5 be ADC external low reference voltage input pin, P5.5 GPIO mode must be set as input mode and disable internal pull-up resistor. If EVHENB bit is “0”, ADC reference high voltage is from internal voltage source selected by VHS[1:0] bits. If VHS[1:0] is “11”, ADC reference high voltage is VDD. If VHS[1:0] is “10”, ADC reference high voltage is 4V. If VHS[1:0] is “01”, ADC reference high voltage is 3V. If VHS[1:0] is “00”, ADC reference high voltage is 2V. The limitation of internal high reference voltage application is VDD can’t below each of internal high voltage level, or the level is equal to VDD. If AIN14 channel is selected as internal 2V or 3V or 4V input channel. There is no any input pin from outside. In this time ADC reference high voltage must be internal VDD or External voltage, not internal 2V/3V/4V. 19.3.1 Signal Format ADC sampling voltage range is limited by high/low reference voltage. The ADC low reference voltage includes internal VSS and external reference voltage source from P5.5/AVREFL controlled by EVLENB bit. The ADC high reference voltage includes internal VDD/4V/3V/2V and external reference voltage source from P5.4/AVREFH pin controlled by EVHENB bit. ADC reference voltage range limitation is “(ADC high reference voltage - low reference voltage) ≥ 2V”. So ADC high reference voltage range is AVREFL+2V to VDD. The range is ADC external high reference voltage range. ADC low reference voltage range is VSS to AVREFH-2V. The range is ADC external high reference voltage range. ADC Internal Low Reference Voltage = 0V. (EVLENB=0) ADC External Low Reference Voltage = VSS to AVREFH-2V. (EVLENB=1) ADC Internal High Reference Voltage = VDD/4V/3V/2V. (EVHENB=0) ADC External High Reference Voltage = AVREFL+2V to VDD. (EVHENB=1) ADC sampled input signal voltage must be from ADC low reference voltage to ADC high reference. If the ADC input signal voltage is over the range, the ADC converting result is error (full scale or zero). ADC Low Reference Voltage ≤ ADC Sampled Input Voltage ≤ ADC High Reference Voltage |
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