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SN8F5708 Datasheet(PDF) 125 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 125 Page - SONiX Technology Company |
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125 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. ADC Datasheet Rev. 2.4 125 19.4 Converting Time The ADC converting time is from ADS=1 (Start to ADC convert) to EOC=1 (End of ADC convert). The converting time duration is depend on ADC clock rate. 12-bit ADC’s converting time is 1/ (ADC clock /4)*16 sec. ADC clock source is fosc and includes fosc/1, fosc/2, fosc/8 and fosc/16 controlled by ADCKS[1:0] bits. The ADC converting time affects ADC performance. If input high rate analog signal, it is necessary to select a high ADC converting rate. If the ADC converting time is slower than analog signal variation rate, the ADC result would be error. So to select a correct ADC clock rate to decide a right ADC converting rate is very important. 12 bits ADC conversion time = 16 ADC clock rate/4 ADCKS[1:0] ADC clock rate fosc = 16MHz fosc = 32MHz Converting time Converting rate Converting time Converting rate 00 fosc/16 1/(16MHz/16/4)*16 = 64us 15.625kHz 1/(32MHz/16/4)*16 = 32us 31.25kHz 01 fosc/8 1/(16MHz/8/4)*16 = 32us 31.25kHz 1/(32MHz/8/4)*16 = 16us 62.5kHz 10 fosc 1/(16MHz/4)*16 = 4us 250kHz 1/(32MHz/4)*16 = 2us 500kHz 11 fosc/2 1/(16MHz/2/4)*16 = 8us 125kHz 1/(32MHz/2/4)*16 = 4us 250kHz 19.5 Data Buffer ADC data buffer is 12-bit length to store ADC converter result. The high byte is ADB register, and the low-nibble is ADR[3:0] bits. The ADB register is only 8-bit register including bit 4 – bit 11 ADC data. To combine ADB register and the low-nibble of ADR will get full 12-bit ADC data buffer. The ADC data buffer is a read-only register and the initial status is unknown after system reset. |
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