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SN8F5708 Datasheet(PDF) 127 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 127 Page - SONiX Technology Company |
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127 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. ADC Datasheet Rev. 2.4 127 ADM Register (0xD2) Bit Field Type Initial Description 7 ADENB R/W 0 ADC control bit. In stop mode, disable ADC to reduce power consumption. 0: Disable 1: Enable 6 ADS R/W 0 ADC conversion control Write 1: Start ADC conversion (automatically cleared by the end of conversion) 5 EOC R/W 0 ADC status bit. 0: ADC progressing 1: End of conversion (automatically set by hardware; manually cleared by firmware) 4..0 CHS[4:0] R/W 0x00 ADC input channel select bit. 00000: AIN0, 00001: AIN1, 00010: AIN2, 00011: AIN3, 00100: AIN4, 00101: AIN5, 00110: AIN6, 00111: AIN7, 01000: AIN8, 01001: AIN9, 01010: AIN10, 01011: AIN11, 11000: AIN12 *(1), 11001: AIN13*(2), 11010: AIN14 *(3), others: Reserved. *(1) AIN12 channel is OP0-Amp output terminal. *(2) AIN13 channel is OP1-Amp output terminal. *(3) The AIN14 is internal 2V or 3V or 4V input channel. There is no any input pin from outside. In this time ADC reference voltage must be internal VDD and External voltage, not internal 2V or 3V or 4V. |
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