SN8F5708 datasheet(165/204 Pages) SONIX

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SN8F5708 Series

In-System Program

Datasheet Rev. 2.4

165

These configurations must be setup completely before starting Page Program. ISP is configured

using the following steps:

Save program data into IRAM. The data continues for 32 bytes.

Set the start address of the content location to PERAM.

Set the start address of the anticipated update area to PEROM [15:5]. (By PEROMH/PRROML

registers)

Write ‘0xA5A’ into PECMD [11:0] to trigger ISP function. Before writing ‘0x5A’ into

PECMD[7:0], PECMD[11:8] must be written ‘0xA’.

Write ‘NOP’ instruction twice.

As an example, assume the 510

th page of program memory (IROM, 0x3FC0 – 0x3FDF) is the

anticipated update area; the content is already stored in IRAM address 0x60 – 0x7F. To perform the

in-system program, simply write starting IROM address 0x3FC0 to EPROMH/EPROML registers, and

then specify buffer starting address 0x60 to EPRAM register. Subsequently, write ‘0xA5A’ into

PECMD [11:0] registers to duplicate the buffer’s data to 510

th page of IROM.

In general, every page has the capability to be modified by in-system program procedure. However,

since the first and least pages (page 0 and 511) respectively stores reset vector and information for

power-on controller, incorrectly perform page program (such as turn off power while programming)

may cause faulty power-on sequence / reset.



Note:

1. Watch dog timer should be clear before the Flash write (program) operation, or

watchdog timer would overflow and reset system during ISP operating.

2. Don’t execute ISP flash ROM program operation for the first page and the last

page, or affect program operation.

SN8F5708 Datasheet(PDF) 165 Page - SONiX Technology Company