71M6541DSLASHFSLASHG datasheet(123/166 Pages) MAXIM

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71M6541D/F/G and 71M6542F/G Data Sheet

Rev 5

123

Name

Location

Rst Wk

Dir

Description

SECURE

SFR B2[6]

R/W

Inhibits erasure of page 0 and flash addresses above the beginning of CE code

as defined by CE_LCTN[5:0]. Also inhibits the read of flash via the SPI and ICE

port.

SLEEP

28B2[7]

Puts the part to SLP mode. Ignored if system power is present. The part

wakes when the Wake timer times out, when push button is pushed, or when

system power returns.

SPI_CMD[7:0]

SFR FD[7:0]

–

SPI command register for the 8-bit command from the bus master.

SPI_E

270C[4]

R/W

SPI port enable. Enables SPI interface on pins SEGDIO36 – SEGDIO39.

Requires that LCD_MAP[36-39] = 0.

SPI_SAFE

270C[3]

R/W

Limits SPI writes to SPI_CMD and a 16-byte region in DRAM. No other

writes are permitted.

SPI_STAT[7:0]

2708[7:0]

SPI_STAT contains the status results from the previous SPI transaction.

Bit 7: Ready error: The 71M654x was not ready to read or write as directed

by the previous command.

Bit 6: Read data parity: This bit is the parity of all bytes read from the

71M654x in the previous command. Does not include the SPI_STAT byte.

Bit 5: Write data parity: This bit is the overall parity of the bytes written to the

71M654x in the previous command. It includes CMD and ADDR bytes.

Bit 4-2: Bottom 3 bits of the byte count. Does not include ADDR and CMD

bytes. One, two, and three byte

instructions return 111.

Bit 1: SPI FLASH mode: This bit is zero when the TEST pin is zero.

Bit 0: SPI FLASH mode ready: Used in SPI FLASH mode. Indicates that the

flash is ready to receive another write instruction.

STEMP[10:3]

STEMP[2:0]

2881[7:0]

2882[7:5]

–

The result of the temperature measurement.

SUM_SAMPS[12:8]

SUM_SAMPS[7:0]

2107[4:0]

2108[7:0]

R/W

The number of multiplexer cycles per XFER_BUSY interrupt. Maximum value

is 8191 cycles.

TBYTE_BUSY

28A0[3]

Indicates that hardware is still writing the 0x28A0 byte. Additional writes to

this byte are locked out while it is one. Write duration could be as long as

6ms.

TEMP_22[10:8]

TEMP_22[7:0]

230A[2:0]

230B[7:0]

–

Storage location for STEMP at 22C. STEMP is an 11-bit word.

TEMP_BAT

28A0[4]

–

R/W

Causes VBAT to be measured whenever a temperature measurement is

performed.

TEMP_BSEL

28A0[7]

–

R/W

Selects which battery is monitored by the temperature sensor: 1 = VBAT,

0 = VBAT_RTC

71M6541D/F/G Datasheet(PDF) 123 Page - Maxim Integrated Products

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