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71M6541D/F/G Datasheet(PDF) 125 Page - Maxim Integrated Products |
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71M6541D/F/G Datasheet(HTML) 125 Page - Maxim Integrated Products |
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125 / 166 page ![]() 71M6541D/F/G and 71M6542F/G Data Sheet Rev 5 125 Name Location Rst Wk Dir Description VSTAT[2:0] SFR F9[2:0] – – R This word describes the source of power and the status of the VDD. VSTAT Description 000 System Power OK. V3P3A>3.0v. Analog modules are functional and accurate. [V3AOK,V3OK] = 11 001 System Power Low. 2.8v<V3P3A<3.0v. Analog modules not accurate. Switch over to battery power is imminent. [V3AOK,V3OK] = 01 010 Battery power and VDD OK. VDD>2.25v. Full digital functionality. [V3AOK,V3OK] = 00, [VDDOK,VDDgt2] = 11 011 Battery power and VDD>2.0. Flash writes are inhibited. If the TRIMVDD[5] fuse is blown, PLL_FAST (I/O RAM 0x2200[4]) is cleared. [V3AOK,V3OK] = 00, [VDDOK,VDDgt2] = 01 101 Battery power and VDD<2.0. When VSTAT=101, processor is nearly out of voltage. Processor failure is imminent. [V3AOK,V3OK] = 00, [VDDOK,VDDgt2] = 00 WAKE_ARM 28B2[5] 0 – R/W Arms the WAKE timer and loads it with WAKE_TMR[7:0]. When SLEEP or LCD_ONLY is asserted by the MPU, the WAKE timer becomes active. WAKE_TMR[7:0] 2880[7:0] 0 – R/W Timer duration is WAKE_TMR+1 seconds. WD_RST 28B4[7] 0 0 W Reset the WD timer. The WD is reset when a 1 is written to this bit. Writing a one clears and restarts the watch dog timer. WF_DIO4 28B1[2] 0 – R DIO4 wake flag bit. If DIO4 is configured to wake the part, this bit is set whenever the de-bounced version of DIO4 rises. It is held in reset if DI04 is not configured for wakeup. WF_DIO52 28B1[1] 0 – R DIO52 wake flag bit. If DIO52 is configured to wake the part, this bit is set whenever the de-bounced version of DIO52 rises. It is held in reset if DI052 is not configured for wakeup. WF_DIO55 28B1[0] 0 – R DIO55 wake flag bit. If DIO55 is configured to wake the part, this bit is set whenever the de-bounced version of DIO55 rises. It is held in reset if DI055 is not configured for wakeup. WF_TMR 28B1[5] 0 – R Indicates that the wake timer caused the part to wake up. WF_PB 28B1[3] 0 – R Indicates that the PB caused the part to wake. WF_RX 28B1[4] 0 – R Indicates that RX caused the part to wake. WF_CSTART WF_RST WF_RSTBIT WF_OVF WF_ERST WF_BADVDD 28B0[7] 28B0[6] 28B0[5] 28B0[4] 28B0[3] 28B0[2] 0 1 0 0 0 0 – R Indicates that the Reset pin, Reset bit, ERST pin, Watchdog timer, the cold start detector, or bad VBAT caused the part to reset. |
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