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SN8F5708 Datasheet(PDF) 140 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 140 Page - SONiX Technology Company |
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140 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. UART Datasheet Rev. 2.4 140 S0CON2 Register (0xD8) Bit Field Type Initial Description 7 BD R/W 0 Baud rate generators selection (mode 1, 3) 0: Timer 1 overflow period 1: Controlled by S0RELH, S0RELL registers 6..0 Reserved R 0x00 S0BUF Register (0x99) Bit Field Type Initial Description 7..0 S0BUF R/W 0x00 Action of writing data triggers UART communication (LSB first). Reception data is available to read by the end of packages. PCON Register (0x87) Bit Field Type Initial Description 7 SMOD R/W 0 UART baud rate control In UART mode 0: Unused. In UART mode 1, 3: The baud rate is generated as the equation in section 20.7 (Baud Rate Control). In UART mode 2: 0: fcpu/64 1: fcpu/32 6..0 Refer to other chapter(s) S0RELH/S0RELL Registers (S0RELH: 0xBA, S0RELL: 0xAA) Bit Field Type Initial Description 15..10 Reserved R 0x00 9..0 S0REL[9:0] R/W 0x00 S0RELH[1:0] & S0RELL[7:0]. UART Reload Register is used for UART baud rate generation. IEN0 Register (0xA8) Bit Field Type Initial Description 7 EAL R/W 0 Interrupts enable. Refer to Chapter Interrupt 4 ES0 R/W 0 Enable UART interrupt |
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