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SN8F5708 Datasheet(PDF) 141 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 141 Page - SONiX Technology Company |
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141 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. UART Datasheet Rev. 2.4 141 Else Refer to other chapter(s) P1OC Register (0xE4) Bit Field Type Initial Description 4 P06OC R/W 0 0: Switch P0.6 (URX) to input mode (required) 1: Switch P0.6 (URX) to open-drain mode * 3 P05OC R/W 0 0: Switch P0.5 (UTX) to push-pull mode 1: Switch P0.5 (UTX) to open-drain mode Else Refer to other chapter(s) * Setting P06OC as high causes URX cannot receive data. P0M Register (0xF9) Bit Field Type Initial Description 6 P06M R/W 0 0: Set P0.6 (URX) as input mode (required) 1: Set P0.6 (URX) as output mode * 5 P05M R/W 0 0: Set P0.5 (UTX) as input mode * 1: Set P0.5 (UTX) as output mode (required) Else Refer to other chapter(s) * The URX and UTX respectively require input and output mode selection to receive/transmit data appropriately. P0 Register (0x80) Bit Field Type Initial Description 6 P06 R/W 0 This bit is available to read at any time for monitoring the bus statue. 5 P05 R/W 0 0: Set P0.5 (UTX) always low * 1: Make P0.5 (UTX) can output UART data (required) Else Refer to other chapter(s) * Setting P05 initially high because UART block drive the shared pin low signal only. |
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