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71M6541D/F/G Datasheet(PDF) 148 Page - Maxim Integrated Products |
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71M6541D/F/G Datasheet(HTML) 148 Page - Maxim Integrated Products |
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148 / 166 page ![]() 71M6541D/F/G and 71M6542F/G Data Sheet 148 Rev 5 Parameter Condition Min Typ Max Unit LCD_DAC Error. VLCD-VLCDnom DAC=12, no Boost V3P3 = 3.6 V V3P3 = 3.0 V VBAT = 4.0 V, V3P3 = 0 V, BRN Mode VBAT = 2.5 V, V3P3 = 0 V, BRN Mode LCD_VMODE[1:0] = 1, LCD_DAC[4:0] = C, LCD_CLK[1:0]=2, LCD_MODE[2:0]=6 -0.5 -1.1 -0.15 2 -1.5 2 0.15 2 V V V V LCD_DAC Error. VLCD-VLCDnom Zero Scale, no Boost V3P3 = 3.6 V V3P3 = 3.0 V VBAT = 4.0 V, V3P3 = 0 V, BRN Mode VBAT = 2.5 V, V3P3 = 0 V, BRN Mode LCD_VMODE[1:0] = 1, LCD_DAC[4:0] = 0, LCD_CLK[1:0]=2, LCD_MODE[2:0]=6 -0.15 -0.15 -0.15 -0.45 0.15 0.15 0.15 0.15 V V V V LCD_DAC Error. VLCD-VLCDnom Full Scale, with Boost, LCD mode VBAT = 4.0 V, V3P3 = 0 V VBAT = 2.5 V, V3P3 = 0 V LCD_VMODE[1:0] = 2, LCD_DAC[4:0] = 1F, LCD_CLK[1:0]=2, LCD_MODE[2:0]=6 -0.15 -1.3 0.15 V V Notes: 1. The following test conditions also apply to all parameters provided in this table: bypass capacitor CVLCD ≥ 0.1 µF, test load RVLCD = 500 k Ω, no display, all SEGDIO pins configured as DIO. 2. Guaranteed by design; not production tested. |
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