BQ25713 datasheet(38/111 Pages) TI2

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than 2.4 V (configurable through VSYS_UVP register bits), there is 2-ms deglitch time, the IIN_DPM is clamped

to 0.5 A by the charger itself.

If hiccup mode is enabled with VSYS_UVP_NO_HICCUP = 0b, after 2-ms deglitch time, the charger should shut

down for 500 ms.The charger will restart for 10 ms if VSYS is still lower than 2.4 V, the charger should shut

down again. This hiccup mode will be tried continuously, if the charger restart failed for 7 times in 90 second, the

charger will be latched off. Fault VSYS_UVP bit will be set to 1 to report a system short fault. The charger only

can be enabled again by writing Fault VSYS_UVP bit to 0b.

If hiccup mode is disabled VSYS_UVP_NO_HICCUP = 1b. After 2-ms deglitch time, the charger should shut

down and latched off. Fault VSYS_UVP bit will be set to 1 to report a system short fault. The charger only can be

enabled again once the host writes Fault VSYS_UVP bit to 0b.

8.3.21.9 Thermal Shutdown (TSHUT)

The WQFN package has low thermal impedance, which provides good thermal conduction from the silicon to

the ambient, to keep junction temperatures low. As added level of protection, the charger converter turns off for

self-protection whenever the junction temperature reaches the 155°C. The charger stays off until the junction

temperature falls below 135°C. During thermal shut down, the REGN LDO current limit is reduced to 16 mA and

stays on. When the temperature falls below 135°C, charge can be resumed with soft start.

When thermal shut down is triggered, TSHUT status bit will be triggered. This status bit keep triggered until host

read to clear it. If TSHUT is still present during host read, then this bit will try to be cleared when host read but

finally keep triggered because TSHUT still exists.

8.4 Device Functional Modes

8.4.1 Forward Mode

When input source is connected to VBUS, BQ25730 is in forward mode to regulate system and charge battery.

8.4.1.1 System Voltage Regulation with Narrow VDC Architecture

The device employs Narrow VDC architecture (NVDC) with BATFET separating the system from the battery. The

minimum system voltage is set by VSYS_MIN register REG0x0D/0C(). Even with a depleted battery, the system

is regulated above the minimum system voltage.

When the battery is below minimum system voltage setting, the BATFET operates in linear mode (LDO mode),

and the system is regulated at VSYS_MIN register value. As the battery voltage rises above the minimum

system voltage, system voltage is regulated 150 mV above battery voltage when BATFET is turned off (no

charging or no supplement current). When in charging or in supplement mode, the voltage difference between

the system and battery is the VDS of the BATFET and the BATFET is fully on.

8.4.1.2 Battery Charging

The BQ25730 charges 1- to 5-cell battery in constant current (CC), and constant voltage (CV) mode. Based on

CELL_BATPREZ pin setting, the charger sets default battery voltage 4.2 V/cell to ChargeVoltage(). According

to battery capacity, the host programs appropriate charge current to ChargeCurrent() register. When battery is

full or battery is not in good condition to charge, host terminates charge by setting CHRG_INHIBIT bit to 1b, or

setting ChargeCurrent() to zero.

8.4.2 USB On-The-Go

The BQ25730 supports USB OTG functionality to deliver power from the battery to other portable devices

through USB port (reverse mode). The OTG output voltage is compliant with USB-C PD specification, including

5 V, 9 V, 15 V, and 20 V. The output current regulation is compliant with USB-C PD specification, including 500

mA, 1.5 A, 3 A and 5 A, and so forth.

Similar to forward operation, the device switches from PWM operation to PFM operation at light load to improve

efficiency.

BQ25730

SLUSE65A – FEBRUARY 2021 – REVISED JANUARY 2024

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