BQ25713 datasheet(6/111 Pages) TI2

6 / 111 page

Table 6-1. Pin Functions (continued)

I/O

DESCRIPTION

NAME

NUMBER

CHRG_OK

Open drain active high indicator to inform the system good power source is connected to

the charger input. Connect to the pullup rail via 10-kΩ resistor. When VBUS rises above 3.5

V and falls below 25.8 V, CHRG_OK is HIGH after 50-ms deglitch time. When VBUS falls

below 3.2 V or rises above 26.8 V, CHRG_OK is LOW. When one of SYSOVP, SYSUVP,

ACOC, TSHUT, BATOVP, BATOC or force converter off faults occurs, CHRG_OK is asserted

LOW.

CMPIN

Input of independent comparator. The independent comparator compares the voltage

sensed on CMPIN pin with internal reference, and its output is on CMPOUT pin. Internal

reference, output polarity and deglitch time is selectable by the I2C host. With polarity HIGH

(CMP_POL = 1b), place a resistor between CMPIN and CMPOUT to program hysteresis.

With polarity LOW (CMP_POL = 0b), the internal hysteresis is 100 mV. If the independent

comparator is not in use, tie CMPIN to ground.

CMPOUT

Open-drain output of independent comparator. Place a pullup resistor from CMPOUT to

pullup supply rail. Internal reference, output polarity and deglitch time are selectable by the

I2C host. If the independent comparator is not in use, float CMPOUT pin.

COMP2

Buck boost converter compensation pin 2. Refer to Section 8.3.12 for COMP2 pin RC

network.

COMP1

Buck boost converter compensation pin 1. Refer to Section 8.3.12 for COMP1 pin RC

network.

OTG/VAP/FRS

Active HIGH to enable OTG or FRS modes. 1) When OTG_VAP_MODE=1b and

EN_OTG=1b, pulling high this pin can enable OTG mode. 2) When OTG_VAP_MODE=1b

and EN_FRS=1b, pulling high this pin can enable FRS mode in forward operation.

HIDRV1

Buck mode high-side power MOSFET (Q1) driver. Connect to high-side n-channel MOSFET

gate.

HIDRV2

Boost mode high-side power MOSFET(Q4) driver. Connect to high-side n-channel MOSFET

gate.

IADPT

The adapter current monitoring output pin. VIADPT = 20 or 40 × (VACP – VACN) with ratio

selectable through IADPT_GAIN bit. This pin is also used to program the inductance used in

the application. Refer to Section 8.3.11 for selecting resistor from the IADPT pin to ground .

For a 4.7-µH inductance, the resistor is 191-kΩ or 187-kΩ standard value. Place a 100-pF

or less ceramic decoupling capacitor from IADPT pin to ground. IADPT output voltage is

clamped below 3.3 V.

IBAT

The battery current monitoring output pin. VIBAT = 8 or 16 × (VSRP – VSRN) for charge

current, or VIBAT = 8 or 16 × (VSRN – VSRP) for discharge current, with ratio selectable

through IBAT_GAIN bit. Place a 100-pF or less ceramic decoupling capacitor from IBAT pin

to ground. This pin can be floating if not in use. Its output voltage is clamped below 3.3 V.

ILIM_HIZ

Input current limit setting pin. Program ILIM_HIZ voltage by connecting a resistor divider

from VDDA rail to ground. The pin voltage is calculated as: V(ILIM_HIZ) = 1 V + 40 × IDPM ×

Rac, in which IDPM is the target input current limit.

When EN_EXTILIM = 1b the input current limit used by the charger is the lower setting of

ILIM_HIZ pin and IIN_HOST register. When EN_EXTILIM = 0b input current limit is only

determined by IIN_HOST register.

When the pin voltage is below 0.4 V, the device enters high impedance (HIZ) mode with

low quiescent current. When the pin voltage is above 0.8 V, the device is out of HIZ mode.

The ILIM_HIZ pin voltage is continuous read and used for updating current limit setting (If

EN_EXTILIM=1b ), this allows dynamic change input current limit setting by adjusting this pin

voltage.

LODRV1

Buck mode low side power MOSFET (Q2) driver. Connect to low side n-channel MOSFET

gate.

LODRV2

Boost mode low side power MOSFET (Q3) driver. Connect to low side n-channel MOSFET

gate.

PGND

GND

Device power ground.

PROCHOT

Active low open drain output indicator. It monitors adapter input current, battery discharge

current, and system voltage. After any event in the PROCHOT profile is triggered, a pulse is

asserted. The minimum pulse width is adjustable through PROCHOT_WIDTH bits.

BQ25730

SLUSE65A – FEBRUARY 2021 – REVISED JANUARY 2024

www.ti.com

Submit Document Feedback

Product Folder Links: BQ25730

BQ25713 Datasheet(PDF) 6 Page - Texas Instruments

BQ25713 Datasheet(HTML) 6 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL