BQ25713 datasheet(68/111 Pages) TI2

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Table 8-32. ChargeOption3 Register (I2C address = 35h) Field Descriptions (continued)

BIT

FIELD

TYPE

RESET

DESCRIPTION

EN_OTG_BIGCAP

R/W

Enable OTG compensation for VBUS effective capacitance larger than 33

μF

0b: Disable OTG large VBUS capacitance compensation (Recommended

for VBUS effective capacitance smaller than 33 μF) <default at POR>

1b: Enable OTG large VBUS capacitance compensation (Recommended

for VBUS effective capacitance larger than 33 μF)

Table 8-33. ChargeOption3 Register (I2C address = 34h) Field Descriptions

BIT

FIELD

TYPE

RESET

DESCRIPTION

BATFET_ENZ

R/W

Turn off BATFET under battery only mode. If charger is not in battery only

mode this bit is not allowed to be written to 1. Under battery only OTG

mode, this bit is forced to be 0b.

0b: Not force turn off BATFET <default at POR>

1b: Force turn off BATFET

EN_VBUS_VAP

R/W

Enable the VBUS VAP for VAP operation mode 2&3

0b: Disabled <default at POR>

1b: Enabled

OTG_VAP_MODE

R/W

The selection of the external OTG/VAP/FRS pin control. Don't

recommend to change pin control after OTG/VAP/FRS pin is pulled high.

0b: the external OTG/VAP/FRS pin controls the EN/DIS VAP mode

1b: the external OTG/VAP/FRS pin controls the EN/DIS OTG mode

4-3

IL_AVG

R/W

10b

Converter inductor average current clamp. It is recommended to choose

the smallest option which is higher than maximum possible converter

average inductor current.

00b: 6A

01b: 10A

10b: 15A <default at POR>

11b: Disabled

CMP_EN

R/W

Enable Independent Comparator with effective low.

0b: Disabled

1b: Enabled <default at POR>

BATFETOFF_HIZ

R/W

Control BATFET on/off during charger HIZ mode.

0b: BATFET on during charger HIZ mode <default at POR>

1b: BATFET off during charger HIZ mode

PSYS_OTG_IDCHG

R/W

PSYS function during OTG mode.

0b: PSYS as battery discharge power minus OTG output power <default

at POR>

1b: PSYS as battery discharge power only

BQ25730

SLUSE65A – FEBRUARY 2021 – REVISED JANUARY 2024

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