BQ25713 datasheet(39/111 Pages) TI2

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8.4.3 Pass Through Mode (PTM)-Patented Technology

The charger can be operated in the pass through mode (PTM) to improve efficiency. In PTM, the Buck and Boost

high-side FETs (Q1 and Q4) are both turned on, while the Buck and Boost low-side FETs are both turned off.

The input power is directly passed through the charger to the system. The switching losses of MOSFETs and

the inductor core loss are saved. The charger quiescent current under PTM mode is also minimized to further

increase light load efficiency. Charger will be transition from normal Buck-Boost operation to PTM operation by

setting EN_PTM = 1b; and will transition out of PTM mode with host control by setting EN_PTM =0b. Please

contact factory for more detail information about PTM mode.

8.5 Programming

The charger supports battery-charger commands that use either Write-Word or Read-Word protocols, as

summarized in Section 8.5.1.7. The I2C address is 6Bh(0b1101011) consist of 7 bits. Adding read(1b) and

write(0b) to the end of address 7bits, the total 8bits data format address should be D6h (1101011_0 for write)/

D7h(1101011_1 for read). The ManufacturerID and DeviceID registers are assigned to identify the charger

device. The ManufacturerID register command always returns 40h.

8.5.1 I2C Serial Interface

The BQ25730 uses I2C compatible interface for flexible charging parameter programming and instantaneous

device status reporting. I2C is a bi-directional 2-wire serial interface. Only two bus lines are required: a serial

data line (SDA) and a serial clock line (SCL). Devices can be considered as host or target when performing data

transfers. A host is the device which initiates a data transfer on the bus and generates the clock signals to permit

that transfer. At that time, any device addressed is considered a target device.

The device operates as a target device with address D6h, receiving control inputs from the host device like micro

controller or a digital signal processor through REG00-REG3F. The I2C interface supports both standard mode

(up to 100 kHz), and fast mode (up to 400 kHz). connecting to the positive supply voltage via a current source or

pull-up resistor. When the bus is free, both lines are HIGH. The SDA and SCL pins are open drain.

8.5.1.1 Timing Diagrams

SCL

SDA

A = Start condition

H = LSB of data clocked into target

B = MSB of address clocked into target

I = Target pulls SDA line low

C = LSB of address clocked into target

J = Acknowledge clocked into host

D = R/W bit clocked into target

K = Acknowledge clock pulse

E = Target pulls SDA line low

L = Stop condition, data executed by target

F = ACKNOWLEDGE bit clocked into host

M = New start condition

G = MSB of data clocked into target

Figure 8-6. I2C Write Timing

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BQ25730

SLUSE65A – FEBRUARY 2021 – REVISED JANUARY 2024

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