BQ25713 datasheet(78/111 Pages) TI2

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Table 8-43. Vmin Active Protection Register (I2C address = 3Eh) Field Descriptions

BIT

FIELD

TYPE

RESET

DESCRIPTION

VSYS_TH2, Bit5

R/W

0 = Adds 0 mV of VAP mode VSYS PROCHOT trigger voltage threshold

1 = Adds 3200 mV of VAP mode VSYS PROCHOT trigger voltage

threshold

VSYS_TH2, Bit4

R/W

1b(2S~5s

)

0b(1S)

0 = Adds 0 mV of VAP mode VSYS PROCHOT trigger voltage threshold

1 = Adds 1600 mV of VAP mode VSYS PROCHOT trigger voltage

threshold

VSYS_TH2, Bit3

R/W

1b(2S~5s

)

0b(1S)

0 = Adds 0 mV of VAP mode VSYS PROCHOT trigger voltage threshold

1 = Adds 800 mV of VAP mode VSYS PROCHOT trigger voltage

threshold

VSYS_TH2, Bit2

R/W

0 = Adds 0 mV of VAP mode VSYS PROCHOT trigger voltage threshold

1 = Adds 400 mV of VAP mode VSYS PROCHOT trigger voltage

threshold

VSYS_TH2, Bit1

R/W

0b(1S)

1b(2S~5s

)

0 = Adds 0 mV of VAP mode VSYS PROCHOT trigger voltage threshold

1 = Adds 200 mV of VAP mode VSYS PROCHOT trigger voltage

threshold

VSYS_TH2, Bit0

R/W

0 = Adds 0 mV of VAP mode VSYS PROCHOT trigger voltage threshold

1 = Adds 100 mV of VAP mode VSYS PROCHOT trigger voltage

threshold

EN_VSYSTH2_FOLLOW_VS

YSTH1

R/W

Enable internal VSYS_TH2 follow VSYS_TH1 setting neglecting register

REG0x3E[7:2] setting

0b: disable <default at POR>

1b: enable

EN_FRS

R/W

Fast Role Swap feature enable (note not recommend to change EN_FRS

during OTG operation, the FRS bit from 0 to 1 change will disable power

stage for about 200 μs (Fs = 400 kHz). HIZ mode holds higher priority, If

EN_HIZ=1b, this EN_FRS bit should be forced to 0b.

0b: disable <default at POR>

1b: enable

BQ25730

SLUSE65A – FEBRUARY 2021 – REVISED JANUARY 2024

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