 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
BQ25713 Datasheet(PDF) 67 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
BQ25713 Datasheet(HTML) 67 Page - Texas Instruments |
|
|
67 / 111 page  8.6.13 ChargeOption3 Register (I2C address = 35/34h) [reset = 0434h] Figure 8-28. ChargeOption3 Register (I2C address = 35/34h) [reset = 0434h] 7 6 5 4 3 2 1 0 EN_HIZ RESET_REG RESET_VINDP M EN_OTG EN_ICO_MOD E EN_PORT_CT RL EN_VSYS_MIN _SOFT_SR EN_OTG_BIGC AP R/W R/W R/W R/W R/W R/W R/W R/W 7 6 5 4 3 2 1 0 BATFET_ENZ EN_VBUS_VAP OTG_VAP_MO DE IL_AVG CMP_EN BATFETOFF_H IZ PSYS_OTG_ID CHG R/W R/W R/W R/W R/W R/W R/W LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 8-32. ChargeOption3 Register (I2C address = 35h) Field Descriptions BIT FIELD TYPE RESET DESCRIPTION 7 EN_HIZ R/W 0b Device HIZ Mode Enable When the charger is in HIZ mode, the device draws minimal quiescent current. With VBUS above UVLO. REGN LDO stays on, and system powers from battery. 0b: Device not in HIZ mode <default at POR> 1b: Device in HIZ mode 6 RESET_REG R/W 0b Reset Registers All the registers are reset to POR default setting except the VINDPM register. 0b: Idle <default at POR> 1b: Reset all the registers to default values. After reset, this bit goes back to 0. 5 RESET_VINDPM R/W 0b Reset VINDPM Threshold 0b: Idle 1b: Converter is disabled to measure VINDPM threshold. After VINDPM measurement is done, this bit goes back to 0 and converter starts. (When battery voltage is lower than VSYS_MIN this function is not recommended due to potential risk to crash system during VINDPM measurement .) 4 EN_OTG R/W 0b OTG Mode Enable Enable device in OTG mode when OTG/VAP/FRS pin is HIGH. 0b: Disable OTG <default at POR> 1b: Enable OTG mode to supply VBUS from battery. 3 EN_ICO_MODE R/W 0b Enable ICO Algorithm 0b: Disable ICO algorithm. <default at POR> 1b: Enable ICO algorithm. 2 EN_PORT_CTRL R/W 1b Enable BATFET control 0b: Disable BATFET control pin by HIZ BATDRV pin 1b: Enable BATFET control pin by activate BATDRV pin 1 EN_VSYS_MIN_SOFT_SR R/W 0b Enable VSYS_MIN soft slew rate transition 0b: Disable VSYS_MIN soft slew rate transition <default at POR> 1b:Enable VSYS_MIN soft slew rate transition (1LSB/8μs=12.5mV/μs) www.ti.com BQ25730 SLUSE65A – FEBRUARY 2021 – REVISED JANUARY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 67 Product Folder Links: BQ25730 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
