BQ25713 datasheet(90/111 Pages) TI2

90 / 111 page

CIN

CHG

= I

D × (1

(4)

Low ESR ceramic capacitor such as X7R or X5R is preferred for input decoupling capacitor and should be

placed in front of RAC current sensing and as close as possible to the power stage half bridge MOSFETs.

Capacitance after RAC before power stage half bridge should be limited to 10 nF + 1 nF referring to Figure 9-3

diagram. Because too large capacitance after RAC could filter out RAC current sensing ripple information. Voltage

rating of the capacitor must be higher than normal input voltage level, 25-V rating or higher capacitor is preferred

for 19-V to 20-V input voltage.

Ceramic capacitors (MLCC) show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias

voltage is applied across a ceramic capacitor, as on the input capacitor of a charger. The effect may lead

to a significant capacitance drop, especially for high input voltages and small capacitor packages. See the

manufacturer's data sheet about the derating performance with a dc bias voltage applied. It may be necessary

to choose a higher voltage rating or nominal capacitance value in order to get the required effective capacitance

value at the operating point.

9.2.2.5 Output Capacitor

Output capacitor also should have enough ripple current rating to absorb output switching ripple current. To

get good loop stability, the resonant frequency of the output inductor and output capacitor should be designed

between 10 kHz and 20 kHz. The preferred ceramic capacitor is 25-V X7R or X5R for output capacitor. Minimum

7 pcs of 10-μF 0603 package capacitor is suggested to be placed as close as possible to Q3&Q4 half bridge

(between Q4 drain and Q3 source terminal). Total minimum output effective capacitance along VSYS distribution

line is 50 μF refers to Table 9-1. Recommend to place minimum 20-μF MLCC capacitors after the charge current

sense resistor for best stability.

Ceramic capacitors show a dc-bias effect. This effect reduces the effective capacitance when a dc-bias

voltage is applied across a ceramic capacitor, as on the output capacitor of a charger. The effect may lead

to a significant capacitance drop, especially for high output voltages and small capacitor packages. See the

manufacturer's data sheet about the derating performance with a dc bias voltage applied. It may be necessary

to choose a higher voltage rating or nominal capacitance value in order to get the required capacitance value

at the operating point. Considering the 25-V 0603 package MLCC capacitance derating under 21-V to 23-V

output voltage, the recommended practical capacitors configuration at VSYS output terminal can also be found

in Table 9-1. Tantalum capacitors (POSCAP) can avoid dc-bias effect and temperature variation effect which are

recommend to be used along VSYS output distribution line to meet total minimum effective output capacitance

requirement.

Table 9-1. Minimum Output Capacitance Requirement

OUTPUT CAPACITORS vs TOTAL INPUT

POWER

65 W

90 W

130 W

Minimum Effective Output Capacitance

50 μF

Minimum output capacitors at charger VSYS

output terminal

7*10 μF (0603 25 V MLCC)

9*10 μF (0603 25 V MLCC)

Additional output capacitors along VSYS

distribution line

2*22 μF (25 V~35 V

POSCAP)

2*22 μF (25 V~35 V

POSCAP)

2*22 μF (25 V~35 V

POSCAP)

9.2.2.6 Power MOSFETs Selection

Four external N-channel MOSFETs are used for a synchronous switching battery charger. The gate drivers are

integrated into the IC with 6 V of gate drive voltage. 30 V or higher voltage rating MOSFETs are preferred for

19-V to 20-V input voltage.

Figure-of-merit (FOM) is usually used for selecting proper MOSFET based on a tradeoff between the conduction

loss and switching loss. For the top side MOSFET, FOM is defined as the product of a MOSFET's on-resistance,

RDS(ON), and the gate-to-drain charge, QGD. For the bottom side MOSFET, FOM is defined as the product of the

MOSFET's on-resistance, RDS(ON), and the total gate charge, QG.

BQ25730

SLUSE65A – FEBRUARY 2021 – REVISED JANUARY 2024

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